1) Field of the Invention
The present invention relates to a load actuation circuit for driving a load, and more particularly to a load actuation circuit having a function to place a limit on a load current below a predetermined current value.
2) Description of the Related Art
So far, as a load actuation circuit designed to limit a load current when the load current falls into an excess current condition, there has known one disclosed in Japanese Unexamined Patent Publication (HEI) 2-226808, in which a current detection transistor (which will be referred to hereinafter as a xe2x80x9cdetection transistorxe2x80x9d) comprising a MOS transistor whose drain and gate are respectively connected to a drain and gate of a MOS transistor forming an output transistor in the form of common lines is provided, and gates and one transistor (which will be referred to hereinafter as a xe2x80x9cfirst transistorxe2x80x9d) constituting a current mirror circuit is located on the source side of this detection transistor so that a load current flowing through the output transistor into a load is limited below a predetermined value by controlling a gate voltage of the output transistor according to a current flowing through the other transistor (which will be referred to hereinafter as a xe2x80x9csecond transistorxe2x80x9d) organizing the same current mirror circuit.
There is a problem which arises with the load actuation circuit disclosed in this publication, however, in that, since the gate of the output transistor and the gate of the detection transistor are connected through a resistor to each other or directly wired together, difficulty is encountered in establishing the correspondence between the gate-source voltage of the output transistor and the gate-source voltage of the detection transistor, which can cause no coincidence in operating point between these transistors.
That is, the first transistor constituting the current mirror circuit is connected to the source side of the detection transistor whereas no transistor is coupled to the source side of the output transistor; therefore, an electric potential difference corresponding to a voltage drop (in a case in which the first transistor is a bipolar transistor, the forward voltage Vf in a P-N junction becomes approximately 0.7V), developing due to a current flowing through the first transistor, occurs between the source electric potentials of these transistors, thereby causing a difference in operating point between the output transistor and the detection transistor.
The occurrence of an operating point difference makes it difficult to precisely detect a load current flowing from the detection transistor to the output transistor so that high-accuracy current limitation becomes unfeasible.
Meanwhile, as a load actuation circuit capable of solving such a problem, this applicant has already proposed a circuit arrangement in which a voltage drop means is located between a gate of an output transistor and a gate of a detection transistor to produce a voltage drop equal to that in a first transistor (Japanese Unexamined Patent Publication (HEI) 10-32475).
Referring to FIG. 15, a description will be given hereinbelow of an example of this proposed load actuation circuit.
FIG. 15 shows a load actuation circuit in which an N-channel MOS transistor is employed as each of an output transistor To and a detection transistor Ts, and the drain of the output transistor To is connected through an output terminal 4 to one terminal of a load 2, with the other terminal thereof receiving a positive power-supply voltage from the positive terminal (electrode) of a direct-current power source for load actuation, while the source of the output transistor To is coupled through an output terminal 6 to the ground equal in electric potential to the negative terminal (electrode) side of the dc power source so that the output transistor To operates as the so-called low-side switch.
In addition, as FIG. 15 shows, according to the above-mentioned proposed load actuation circuit, the drain of the detection transistor Ts is connected to the drain of the output transistor To and the source of the detection transistor Ts is connected to the source of the output transistor To through one transistor (first transistor) Ta constituting a current mirror circuit 10, with the other transistor (second transistor) Tb of the same current mirror circuit 10 being connected between the gate and source of the output transistor To, and even a voltage drop means 20 which produces a voltage drop in the first transistor Ta due to a current proportional to a load current flowing through the detection transistor To and reaching the first transistor Ta is provided between the gates of the output transistor To and the detection transistor Ts.
Accordingly, with the foregoing proposed load actuation circuit, while a load current flows through the output transistor To, the drain-source voltage of the output transistor To agrees with the drain-source voltage of the detection transistor Ts to cause a current proportional to the load current to flow certainly in the detection transistor Ts; therefore, as compared with a case in which the drains of the output transistor To and the detection transistor Ts are connected directly to each other or connected to each other in a state where a resistor is interposed therebetween, the load current flowing through the output transistor To is limitable with higher accuracy.
However, in the case of the foregoing proposed load actuation circuit, as FIG. 15 shows, a constant-voltage circuit 50 is provided to generate a constant voltage from a power-supply voltage fed from the external through a power supply terminal 8 so that the constant voltage generated by the constant-voltage circuit 50 is applied through a resistor Ra to a control terminal (concretely, gate) of the detection transistor Ts to actuate the output transistor To and the detection transistor Ts at the constant voltage; therefore, because of the non-uniformity of the output transistor To or the resistor Ra, its temperature property, or the like, there exists a probability of difficulty being experienced in controlling the load current flowing through the output transistor To to a design value.
More concretely, as obvious from a VGS-ID characteristic curve shown in FIG. 16, a load current (in other words, drain current) ID flowing through the output transistor To rises rapidly with an increase in gate-source voltage VGS.
Meanwhile, in the load actuation circuit shown in FIG. 15, a current supplied from the constant-voltage circuit 50 through the resistor Ra to the gate side of the detection transistor Ts depends on a resistance value of the resistor Ra and a voltage across the resistor Ra, thus lowering as the gate-source voltage VGS of the output transistor To increases. For this reason, a supply-possible current (in detail, a conversion value of this current into a drain current ID) from the constant-voltage circuit 50 to the second transistor Tb of the current mirror circuit 10 also decreases as the gate-source voltage VGS of the output transistor To increases, as seen from a supply current characteristic indicated by a solid line in FIG. 16.
In addition, in the load actuation circuit shown in FIG. 15, when a current (current proportional to the load current) flowing from the detection transistor Ts to the first transistor Ta of the current mirror circuit 10 fails of its supply to the second transistor Tb, the gate voltage of the output transistor To lowers to limit the load current (drain current ID) to the current value at that time so that the limit values of the load current become drain current values ID at the intersections (indicated by black circles in FIG. 16) of the MOS transistor VGS-ID characteristic and the supply current characteristic.
However, as indicated by dotted lines in FIG. 16, the MOS transistor VGS-ID characteristic varies in accordance with the non-uniformity of characteristic of the MOS transistor itself or its temperature variation or fluctuation, and the supply current characteristic from the constant-voltage circuit 50 to the current mirror circuit 10 also varies with the non-uniformity of the characteristic of the resistor Ra or the transistor Ta, Tb constituting the current mirror circuit 10, or its temperature variation.
Thus, although the foregoing proposed load actuation circuit allows a current proportional to a load current flowing through the output transistor To to be supplied through the detection transistor Ts to the first transistor Ta of the current mirror circuit 10, the load current limitable through the current mirror circuit 10 varies due to the non-uniformity of each of the aforesaid circuit elements or its temperature variation, which makes it difficult to control the load current flowing through the output transistor To to a design value.
Accordingly, the present invention has been developed with a view to eliminating the above-mentioned problems, and it is therefore an object of the invention to provide a load actuation circuit capable of limiting a load current to a value below a predetermined value with high accuracy without suffering the effects of the non-uniformity of characteristics of circuit elements or their temperature variation.
For this purpose, rather than the above-described related art in which a constant voltage is applied as a load actuation control signal through a resistor to each of control terminals of an output transistor and a detection transistor, in a load actuation circuit according to an aspect of the present invention, a constant current is supplied from a constant-current circuit to an output transistor and a detection transistor. Thus, each of the output transistor and the detection transistor is driven with the constant current, and there is no need to put a resistor in a supply path of the drive current. This can prevent a load current flowing through the output transistor from varying due to the non-uniformity of this resistor or its temperature variation. Accordingly, the present invention can prevent the variation of the limitable load current stemming from the non-uniform characteristics of the circuit elements or their temperature variation, thus limiting the load current to a value below a predetermined value with high accuracy.
Another aspect of the invention provides a load actuation circuit in which the foregoing aspect of the invention is introduced into the load actuation circuit shown in FIG. 14. That is, in the load actuation circuit according to this aspect of the invention, as illustrated in FIG. 1, a series circuit comprising a detection transistor Ts and a first transistor Ta is connected in parallel to an output transistor To for supplying a load current to a load 2, and a voltage drop means 20, being designed to produce a voltage drop substantially equal to a voltage drop developing in the first transistor Ta when a current proportional to the load current flows through the detection transistor Ts, is located between control terminals of the output transistor To and the detection transistor Ts (in FIG. 1, between the gates of these transistors). In addition, a constant-current circuit 30, being designed to supply a constant current Ic as a control signal for load actuation, is connected to the control terminal (in FIG. 1, gate) of the detection transistor Ts, while a second transistor Tb, constituting a current mirror circuit 10 together with the first transistor Ta and varying a voltage level (in FIG. 1, gate voltage) at the control terminal of the detection transistor Ts through the use of a current proportional to the load current flowing through the detection transistor Ts, is connected to the control terminal (in FIG. 1, gate) of the output transistor To.
Accordingly, with this load actuation circuit, not only an operation of the voltage drop means 20 can make a correspondence or coincidence in operating point between the output transistor To and the detection transistor Ts as in the case of the related load actuation circuit shown in FIG. 15, but also the constant current Ic can be supplied as a control signal, for turning on the output transistor To, from the constant-current circuit 30 to the control terminal of the detection transistor Ts so that the load current becomes constant when the second transistor Tb turns off the output transistor.
That is, as illustrated in FIG. 1, in a case in which each of the output transistor To and the detection transistor Ts is constructed using an N-channel MOS transistor as with the related art circuit shown in FIG. 15 and a constant current Ic is fed as a load actuation control signal from the constant-current circuit 30 to the control terminal of the detection transistor Ts, as seen from the supply current characteristic indicated by a solid line in FIG. 2, the current (in detail, a conversion value of this current into a load current drain current ID) to be supplied from the constant-current circuit 30 to the current mirror circuit 10 becomes nearly constant until the gate-source voltage VGS of the output transistor To reaches a predetermined voltage at which the generation of the constant current Ic from the power-supply voltage fed from the external through the power supply terminal 8 becomes unfeasible in the constant-current circuit 30.
Accordingly, with this load actuation circuit, as FIG. 2 shows, even if the MOS transistor VGS-ID characteristic varies due to the non-uniformity of characteristic of the MOS transistor itself or its temperature variation, the load current (drain current ID) limitable through the current mirror circuit 10 becomes nearly constant.
In consequence, this load actuation circuit can prevent the limit value of the load current limitable through the current mirror circuit 10 from varying due to the non-uniformity of characteristics of circuit elements such as the output transistor To, unlike the related art load actuation circuit shown in FIG. 15, thus achieving high-accuracy limiting of the load current.
In the load actuation circuit shown in FIG. 1, although, in conjunction with the related art circuit shown in FIG. 15, an N-channel MOS transistor is employed as each of the output transistor To and the detection transistor Ts and the drain of the output transistor To is connected through the output terminal 4 to one terminal of the load 2, whose other terminal receives a positive power-supply voltage from the positive terminal of the load actuation dc power source, while the source of the output transistor To is wired through the output terminal 6 to the ground equal in electric potential to the negative terminal side of the dc power source so that the output transistor To acts as the so-called low-side switch, for example, in a case in which a load actuation circuit according to the present invention is constructed as a high-side type load actuation circuit shown in FIG. 1, it is also possible that the output transistor To and the detection transistor Ts are constructed with an NPN-type bipolar transistor.
In addition, in a case in which a load actuation circuit is arranged as a so-called high-side type load actuation circuit in which the output transistor To is located on a current path extending from the positive terminal of a dc power source to the load 2, it is also acceptable that, for example, the output transistor To and the detection transistor Ts are constructed with a P-channel MOS transistor or a PNP-type bipolar transistor.
In the case of the employment of a MOS transistor for the output transistor To and the detection transistor Ts, as compared with a bipolar transistor, the MOS transistor can provide a larger current to supply a larger load current to the load. In this case, preferably, the drains of the output transistor To and the detection transistor Ts are connected to each other while the gates, i.e., the control terminals, of these transistors To and Ts are connected through the voltage drop means 20 to each other.
In addition, for the employment of the MOS transistor for the output transistor To and the detection transistor Ts, since an N-channel MOS transistor generally provides a larger current than that of a P-channel MOS transistor, it is more preferable that the output transistor To and the detection transistor Ts are produced with an N-channel MOS transistor. Incidentally, in this case, the constant-current circuit 30 introduces a constant current Ic into the gate of the detection transistor Ts while the second transistor Tb accepts or takes in the constant current Ic fed from the constant-current circuit 30 through the voltage drop means 20 to the gate of the output transistor To.
Still additionally, for the use of the MOS transistor for the output transistor To, even when the output of the constant current Ic from the constant-current circuit 30 is ceased for turning off the output transistor To, the discharge of electric charge accumulated in the parasitic capacity of the MOS transistor constituting the output transistor To is time-consuming, and the output transistor To can defy quick turning-off.
For this reason, in the foregoing load actuation circuit, it is preferable that a discharging means is additionally provided to discharge the electric charge from the gate of the output transistor at the turning-off of the output transistor To. This can turn off the output transistor To promptly at the time of ceasing the current supply to the load 2 to break the load current promptly.
Furthermore, it is also acceptable that the first transistor Ta and the second transistor Tb, constituting the current mirror circuit 10, are made with a bipolar transistor, or that they are made with a MOS transistor.
In the case of the employment of a bipolar transistor as each of the first and second transistors Ta and Tb, preferably, the bases of these bipolar transistors are connected in a common form and the emitters thereof are likewise connected together, and the collector of the bipolar transistor forming the first transistor Ta is connected to the bases connected in the common form and to the detection transistor Ts while the collector of the bipolar transistor forming the second transistor Tb is coupled to the control terminal of the output transistor To.
Preferably, for the employment of the bipolar transistor for the first and second transistors Ta and Tb, the voltage drop means 20 is produced with a semiconductor device such as a diode which generates a forward voltage by a PN junction. That is, the use of such a semiconductor device for the voltage drop means 20 can generate a voltage drop similar to the voltage drop in the second transistor Tb, thereby accomplishing the correspondence in operating point between the output transistor To and the detection transistor Ts.
On the other hand, in the case of the employment of a MOS transistor for each of the first and second transistors Ta and Tb, it is preferable that the gates of the first and second transistors Ta and Tb are connected in a common form and the sources thereof are likewise wired together, and the drain of the MOS transistor constituting the first transistor Ta is connected to the gates connected in a common form and to the detection transistor Ts while the drain of the MOS transistor organizing the second transistor Tb is coupled to the control terminal of the output transistor To.
In addition, preferably, for the employment of a MOS transistor for each of the first and second transistors Ta and Tb, the voltage drop means 20 is made using the same MOS transistor so that a voltage drop takes place due to its gate-source voltage. That is, such a configuration of the voltage drop means 20 can generate a voltage drop equivalent to the voltage drop in the second transistor Tb comprising a MOS transistor, thus achieving the coincidence in operating point between the output transistor To and the detection transistor Ts.
Furthermore, it is also appropriate that the constant-current circuit 30 is composed of a third transistor and a fourth transistor, constituting a current mirror circuit, and a constant-current source, together with the third transistor, connected between positive and negative power-supply lines to supply a constant current Ic to the third transistor, with the fourth transistor being connected to the control terminal of the detection transistor Ts so that a constant current Ic proportional to a current flowing through the third transistor is supplied through the fourth transistor to the control terminal of the detection transistor Ts.
That is, this arrangement of the constant-current circuit 30 enables the supply voltage to the constant-current source to correspond to the power-supply voltage applied to the positive and negative power-supply lines at all times irrespective of voltage variation at the control terminal of the detection transistor Ts, which permits a stable constant current Ic to be supplied through the fourth transistor to the control terminal of the detection transistor Ts.
In addition, also with this arrangement of the constant-current circuit 30, the third and fourth transistors organizing the current mirror circuit can also be constructed with a bipolar transistor or a MOS transistor as in the case of the first and second transistors Ta and Tb constituting the above-mentioned load current limiting current mirror circuit 10.
In the case of the employment of a bipolar transistor for each of the third and fourth transistors, the bases of these transistors are connected to each other in a common form and the emitters thereof are likewise connected to each other in a common form, with the collector of the bipolar transistor constituting the third transistor being connected to the bases connected in the common form and the constant-current source while the collector of the bipolar transistor organizing the fourth transistor being connected to the control terminal of the detection transistor Ts.
Meanwhile, in the case of the configuration of the third and fourth transistors using the bipolar transistors, the collector-emitter voltage of the fourth transistor may vary so that a current to be fed from the constant-current circuit 30 to the control terminal side of the detection transistor Ts shows variation due to the Early effect of the fourth transistor.
The Early effect of the bipolar transistor signifies that, on an increase in the collector-emitter voltage, the depletion layer in the collector-base junction extends toward the base area side to reduce the effective base width, thereby increasing the collector current. Thus, as the control terminal voltage of the detection transistor Ts (in its turn, the output transistor To) decreases, the current to be fed to the control terminal side of the detection transistor Ts becomes larger. In consequence, when the Early effect occurs in the fourth transistor, the supply current characteristic shows slight inclination as indicated by a chain line in FIG. 2, and as the gate-source voltage VGS increases, the limitable load current (drain current ID) decreases.
Accordingly, in order to avoid such a problem, it is preferable that a fifth transistor and a sixth transistor each comprising a bipolar transistor identical to the fourth transistor and having a function to cancel the Early effect are provided with respect to the fourth transistor.
That is, according to this configuration, in the constant-current circuit 30 included in the foregoing load actuation circuit, there are provided a fifth transistor whose base is connected to the collector of the fourth transistor, whose emitter is connected to the emitter of the fourth transistor and whose collector is connected to the power-supply line to the constant-current source on the opposite side to the third transistor, and a sixth transistor whose emitter is connected to the collector of the fourth transistor, whose base is connected to the collector of the fifth transistor and whose collector is connected to the control terminal of the aforesaid detection transistor Ts, so that a constant current Ic proportional to a current flowing through the third transistor is fed through the sixth transistor to the control terminal of the detection transistor Ts.
Thus, according to the load actuation circuit based on this configuration, also for the use of the bipolar transistor for each of the third and fourth transistors constituting the current mirror circuit in the constant-current circuit 30, it is possible that the collector-emitter voltage of the fourth transistor is fixed at the base-emitter forward voltage Vf (approximately 0.7V) of the fifth transistor to cancel the Early effect of the fourth transistor. Thus, this load actuation circuit can lead the constant current Ic, proportional to the current flowing through the third transistor, from the fourth transistor to the sixth transistor to supply it from the sixth transistor to the control terminal side of the detection transistor Ts.
Accordingly, this load actuation circuit is capable of stably supplying the constant current Ic to the control terminal side of the detection transistor Ts without suffering the Early effect of the fourth transistor, thus limiting the load current to a value below a predetermined value with high accuracy.
Furthermore, the constant-current circuit 30 supplies a constant current Ic to the control terminal of the detection transistor Ts for actuating the detection transistor Ts directly and driving the output transistor To through the voltage drop means 20, and further supplies a current corresponding to a current flowing through the detection transistor Ts to the second transistor Tb constituting the current limiting current mirror circuit 10, and in this case, a minimum output voltage of the constant-current circuit 30 needed for the actuation of the output transistor To is a control terminal voltage needed for turning on the output transistor To (in the case of the output transistor To comprising an N-channel MOS transistor shown in FIG. 1, a threshold voltage of the MOS transistor) plus a voltage drop developing owing to the voltage drop means 20.
Accordingly, the power-supply voltage (the power-supply voltage to be applied to the aforesaid positive and negative power-supply lines) to be supplied to the constant-current circuit 30 is also required to be set so that the output voltage from the constant-current circuit 30 becomes above this voltage. For example, if the power-supply voltage varies to a value lower than this voltage, then the actuation (turning-on) of the output transistor To becomes unfeasible.
For this reason, in order to continue the load actuation when the power-supply voltage fluctuates (lowers), it is preferable that, in the aforesaid constant-current circuit 30, a bipolar transistor (the fourth transistor or sixth transistor) whose collector is connected to the control terminal of the detection transistor Ts is arranged such that a second collector is provided in a state connected to the control terminal of the output transistor To to further supply a constant current Ic directly through the second collector to the control terminal of the output transistor To.
In this way, not only the detection transistor Ts but also output transistor To can be driven directly by the supply of the constant current Ic from the constant-current circuit 30, which can lower the minimum voltage, ensuring the actuation (turning-on) of the output transistor To even when the power-supply voltage fluctuates (lowers), according to (by) the voltage drop due to the voltage drop means 20, thus achieving more stable load actuation.
Still furthermore, in the above-mentioned load actuation circuit, since the output transistor To and the detection transistor Ts are driven by the supply of the constant current Ic from the constant-current circuit 30, the control terminal voltage of each of these transistors To and Ts (in other words, the output voltage of the constant-current circuit 30) increases to the vicinity of the power-supply voltage in the constant-current circuit 30. Hence, these transistors To and Ts can be destroyed when the constant-current circuit 30 has a high power-supply voltage.
For this reason, in the load actuation circuit according to the invention, it is preferable that a clamping means is provided to hold down (clamp) the control terminal voltage of the output transistor To to a value below a predetermined voltage. This can prevent the control terminal voltage of the output transistor To (namely, the control terminal voltage of the detection transistor Ts) from becoming excessive to destroy the transistors To and Ts.
For example, in this case, it is also appropriate that this clamping means is made to directly hold down the control terminal voltage of the output transistor To to a value below the predetermined voltage, or to hold down the power-supply voltage to be fed to the constant-current circuit 30 to a value below a predetermined value for indirectly holding down the control terminal voltage of the output transistor To to a value below the predetermined voltage.
Moreover, it is also appropriate that the foregoing load actuation circuit further comprises a seventh transistor constituting a current mirror circuit together with the first transistor Ta and the second transistor Tb, and an interrupting (intermittent) control circuit for turning off the output transistor To and the detection transistor Ts when detecting, on the basis of a current flowing through the seventh transistor, the fact that the load current reaches an excessive current above a predetermined value and for turning on the output transistor To and the detection transistor Ts when afterwards detecting the fact that the load current assumes no excessive current. That is, this load actuation circuit is designed to lessen the loss in the output transistor To during the excessive current by turning off the output transistor To when the load current is in an excessive current condition.
In this connection, in the case in which the interrupting control circuit turns on/off the output transistor To and the detection transistor Ts, it is preferable that a delay means is provided in the interrupting control circuit to turn off the output transistor To and the detection transistor Ts after the elapse of a predetermined period of time from the detection of the excessive current. This can prevent the output transistor To from being turned off in error because a rush current at the start of energization to the load 2 is handled as an excessive current.
In addition, in this case, it needs that the load current to be detected as an excessive current by the interrupting control circuit is set at a value lower than a load current limit value depending on a supply current from the constant-current circuit 30 and a current value flowing through the second transistor Tb. This means that, if an excessive-current decision value in the interrupting control circuit exceeds the load current limit value, the load current undergoes the limiting operation on the basis of the current flowing through the second transistor Tb prior to the detection of the excessive current by the interrupting control circuit, thus ruining the function of the interrupting control circuit.
Meanwhile, in the foregoing load actuation circuit according to the invention, since the voltage drop means for creating a voltage drop corresponding to one-stage of transistors constituting a current mirror circuit is put between the control terminal of the output transistor To and the control terminal of the detection transistor Ts to achieve the correspondence in operating point between the output transistor To and the detection transistor Ts, for example, if the power-supply voltage drops temporarily so that difficulty is experienced in supplying a desired current to the voltage drop means, then the electric potential at the control terminal of the output transistor To becomes unstable, which may reflect on a normal load current limiting operation.
Accordingly, in a case in which the load actuation circuit according to the invention is put to use under such conditions as motor vehicles where the power-supply voltage tends to fluctuate, it is preferable that a bias means is provided to form a current path, for bypassing the second transistor Tb, between the control terminal and output terminal of the output transistor To, thereby stabilizing the operation of the output transistor To.
In this way, even if the power-supply voltage drops, the bias means ensures the introduction of the current into the voltage drop means so that the voltage drop means generates a desired voltage drop. Thus, with the load actuation circuit according to the invention, even if the power-supply voltage lowers, the coincidence in operating point between the output transistor To and the detection transistor Ts takes place to accomplish a stable load current limiting operation.
On the other hand, the second transistor Tb is for introducing a constant current, flowing through the voltage drop means 20 into the control terminal side of the output transistor To, into the power-supply line side (in FIG. 1, the ground line forming the negative power-supply line) in accordance with a current flowing through the detection transistor Ts to place a limit on the load current, and for example, if the electric potential on the power-supply line connected to the output terminal of the second transistor Tb fluctuates with an increase in the load current or the like, then the operation of the second transistor Tb (namely, the current mirror circuit 10) becomes unstable, which may reflect on the normal load current limiting operation by the second transistor Tb.
Accordingly, for solving this problem, it is preferable that a bias means is provided to form a current path between the control terminal of the second transistor Tb and the power-supply line with which the output terminal of the second transistor Tb is in connection, which can stabilize the operation of the second transistor Tb (namely, the current mirror circuit 10).
In this way, even if the electric potential on the power-supply line to which connected is the output terminal, being one of the two output terminals (drain and source or collector and emitter) of the second transistor Tb, on the opposite side to the output terminal (the other output terminal) connected to the control terminal of the output transistor To, the bias means can maintain the electric potential difference at the control terminal of the second transistor Tb with respect to the power-supply line in almost constant condition, thus preventing the operation of the second transistor Tb, namely the current mirror circuit 10, from becoming unstable due to the electric potential variation of the power supply line.
In this case, since a need exists only that the bias means flows a very small current so as not to exert influence on the operation to be conducted for when the power-supply voltage or the power-supply line electric potential is in a stable condition, concretely a resistor having a relatively large resistance or a constant-current circuit forcing a very small current to flow can be used as the bias means.